\begin{tikzpicture}[
	circuit logic US, 
	circuit ee IEC, 
	medium circuit symbols,
	node distance=2pt
]

% two AND gates, an OR, and output label

\node [matrix, row sep=10pt, column sep=10pt] (gates)
{
	\coordinate (AND1in) {};
	& \node[and gate,inputs={nnnn}] (AND1) {}; 
	& \coordinate (AND1out) {}; \\

	& 
	& 
	& \coordinate (ORin) {};
	& \node[or gate,inputs={nn}] (OR) {};
	& \node (out) { $\mathit{out}$ }; \\

	\coordinate (AND2in) {};
	& \node[and gate,inputs={iiii}] (AND2) {}; 
	& \coordinate (AND2out) {}; \\
};

% inputs

\node [matrix, row sep=2pt, column sep=2pt] (inputs)
	[above=of gates.north west, anchor=south east]
{
	\node (a) {$a$}; &
	\node (b) {$b$}; &
	\node (c) {$c$}; &
	\node (d) {$d$}; \\
};

% connections

% OR to output label
\draw (OR.output) -- (out.west);

% output of AND1 to OR
\draw (AND1.output) -- 
	(AND1out) --
	(AND1out) |- (OR.input 1) --
	(OR.input 1);
\draw (AND1.output) -- 
	(AND1out) --
	(AND1out) |- (OR.input 1) --
	(OR.input 1);

% output of AND2 to OR
\draw (AND2.output) -- 
	(AND2out) --
	(AND2out) |- (OR.input 2) --
	(OR.input 2);

% a to AND1, AND2
\foreach \k/\ktext in {1/a, 2/b, 3/c, 4/d} {
\node [contact] (branch \ktext) at (\ktext.south |- AND1.input \k) {};
\draw (\ktext.south) -- (branch \ktext.north);
\draw (branch \ktext.east) -- 
	(AND1.input \k);
\draw (branch \ktext.south) -- 
	(branch \ktext.south |- AND2.input \k) -- 
	(AND2.input \k);
}
\end{tikzpicture}
