[CSCI2321] Problems with 16 Bit Alu

[John Howland]

The problem with the 16 bit ALU was that I had left
a test configuration in 16-bit-adder.ijs which was used
to illustrate that the 16 bit ALU gives wrong answers
if you leave the carry output in the answer when teaching
this course last year.  In particular, the last line of
sixteenBitALU was

btd (wireOutput 0 1 2 3 4 ; t3) , (wireOutput 1 2 3 4 ; t2) , (wireOutput 1 2 3 4 ; t1) , wireOutput 1 2 3 4 ; t0

rather than

btd (wireOutput 1 2 3 4 ; t3) , (wireOutput 1 2 3 4 ; t2) , (wireOutput 1 2 3 4 ; t1) , wireOutput 1 2 3 4 ; t0

I have changed this in the 16-bit-adder.ijs file.  This file also contains
a (borderline) test suite, named test

Running the test suit, we have:

    test,. sixteenBitALU rows test
      0      1 0      1
     _1      1 0      0
     _1      1 1     _2
  32767      1 0 _32768
_32768      1 0 _32767
  32767      2 0 _32767
_32768     _1 0  32767
  32767  32767 0     _2
_32768 _32768 0      0

Can you explain the last several entries?
(the last column are the results of each of the test
  inputs)
_______________________________________________________________
John E. Howland       url: http://www.cs.trinity.edu/~jhowland/
Computer Science    email: jhowland at ariel.cs.trinity.edu
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