Example:

(Material [in brackets] is optional.)

[
add $t0, $t1, $t2  at addr 0x4
with PC = 0x4, $t1 = 5, and $t2 = 1

instruction 0x012a4021

opcode 000000
rs 01001
rt 01010
rd 01000
fcn field 100000
(other fields unused)

]

PC:
	input 0x8
	output 0x4

Instruction memory:
	input 0x4
	output 0x012a4021

Inputs and output of top-left adder:
	in1 0x4 [current PC]
	in2 4
	out 0x8 [incremented PC]

Inputs and output of top-right adder:
	in1 not used
	in2 not used
	output not used

Control signals:
	RegDst	1
	ALUSrc	0
	MemtoReg 0
	RegWrite 1
	MemRead	0
	MemWrite 0
	Branch 0
	ALUOp 10

Inputs and output of register file:
	Read register 1 01001 [$t1]
	Read register 2 01010 [$t2]
	Write register 01000 [$t0]
	Write data 0x6 [from ALU]
	Read data 1 0x5
	Read data 2 0x1

Inputs and output of the main ALU, including the control signals:
	ALU control 0010 (add)
	ALU input 1 0x5 [from $t1]
	ALU input 2 0x1 [from $t2]
	ALU result 0x6
	Zero not used [but it's 0]

Inputs and output of data memory:
	Address not used
	Write data not used
	Write 0
	Read 0
	Read data not used

State elements to be changed:
	PC, new value 0x8
	register file, register $t0 to 0x6